ATM communication system interconnect/termination unit
US5920561A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 7, 1996 |
| Grant date | Jul 6, 1999 |
| Priority date | — |
| Expiry date | Mar 7, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5616
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An asynchronous transfer mode (ATM) digital electronic communication system includes an ATM communication system interconnection and termination unit (ATMCSI/TU). This ATMCSI/TU includes both a programmable microprocessor and several hardware-implemented coprocessors. The hardware-implemented coprocessors are under control of the microprocessor, and are dedicated to the performing of repetitive tasks. Thus, the microprocessor is freed to perform supervisory tasks in the ATM in addition to performing tasks associated with actual communication of digital data packages (i.e., CS-PDU's) in the ATM system. Thus, the APU is freed from doing repetitive data manipulation tasks, while these tasks are performed by one or more hardware-implemented coprocessors using memory mapped data structures and linked lists of data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.