Method and apparatus for reducing key-up distortion by pre-heating transistors
US5920808A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 12, 1996 |
| Grant date | Jul 6, 1999 |
| Priority date | — |
| Expiry date | Dec 12, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/1935
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A biasing circuit for a power amplifier, for use in a transmitter, that substantially reduces distortion during key-up and thereby reduces key-up time. The power amplifier includes an output transistor and a bias circuit. The bias circuit is applied to all the class AB stages of the power amplifier. The bias circuit provides to the output transistor a first bias level during the preheat period and a second bias level during the transmit period. This first bias level is predetermined to cause the output transistor to reach the steady-state junction temperature achieved by the output transistor during the transmit period (i.e., when transmitting output signals biased with the second bias level). The preheat period ends when this steady-state temperature is reached. Thus, the power amplifier can then transition to a transmit period having already reached the steady-state junction temperature. Because the output transistor is already heated to the steady-state junction temperature, "thermal" distortion (i.e., the distortion incurred when the output transistor's junction temperature changes while transmitting) is avoided and the key-up time is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.