Patent · US Expired

Control circuit for generating control signals for controlling read and write accesses to a memory

US5920894A · kind A · utility

7Cited by
7References
1Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 24, 1993
Grant dateJul 6, 1999
Priority date
Expiry dateJun 24, 2013

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/18
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A circuit arrangement for controlling access to a common memory by two or more processors, one of which is privileged, accelerates and simplifies the execution of the accesses by provision for each processor of its own address register and its own data register. As a result, a processor can process the data read during an access while the next access to the memory is already being carried out for another processor. In the case of write operations, the waiting times are reduced, notably for the non-privileged processors when a write operation is interrupted by a privileged processor, because the data to be written can then be transferred directly to the associated data register.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.