Method and apparatus for avoiding control reads in a network node
US5922046A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 1996 |
| Grant date | Jul 13, 1999 |
| Priority date | — |
| Expiry date | Sep 12, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5681
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A mechanism for avoiding the initiation of control read transactions on a system bus coupling a host system having a host memory and an interface connected to a peripheral unit as data is moved between the host system and the peripheral unit is presented. Control information associated with data memory portions in host memory is written to the interface for data memory portions storing outgoing data and data memory portions to receive incoming data. The interface includes a controller for moving data between the host memory and the interface by first obtaining the control information for the associated data portions. The interface writes status reports in association with the movement of data between the interface and the host memory via the system bus. The mechanism thus enables data transfers to occur via the system without the initiation of control reads in absence of an exception condition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.