Integrated device with pads
US5923076A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 1997 |
| Grant date | Jul 13, 1999 |
| Priority date | — |
| Expiry date | Mar 5, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated device having an N-type well region formed in a P-type substrate and an N.sup.+ type contact ring housed in the well region. The well region forms respective capacitors with a conductive layer superimposed on the substrate, and with the substrate itself. The conductive layer and the substrate are grounded, and the contact ring is connected to the supply, so that the two capacitors are in parallel to each other and, together with the internal resistance of the well region, form a filter for stabilizing the supply voltage. When connected to an input buffer stage of the device, the filter provides for damping the peaks produced on the supply line of the input buffer by high-current switching of the output buffers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.