Switching supply test mode for analog cores
US5923097A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 1997 |
| Grant date | Jul 13, 1999 |
| Priority date | — |
| Expiry date | Jul 24, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2884
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit such as an application specific integrated circuit (ASIC) which has operational power supplies provided for different respective analog cores and digital logic and/or macros may be tested using on-chip power supplies, preferably comprising operational amplifiers connected as voltage followers and controlled by a band-gap voltage source or a voltage divider, drawing power from a single power supply to the chip which is generally provided in a standardized pin-out location. Disablement of respective operational amplifiers also provides electrical isolation of the respective cores during testing. A reduced pin-count is involved in the testing procedure since operational power supply connections can be open circuited or "tri-stated". On-chip power supplies for testing provides power while avoiding a need to provide low-noise power supplies and/or complex switching in a test system or to utilize custom front-end boards or both to provide power to arbitrary chip or package connections.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.