Method and apparatus for checkpointing in computer system
US5923832A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 14, 1997 |
| Grant date | Jul 13, 1999 |
| Priority date | — |
| Expiry date | Mar 14, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1438
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system monitors inter-process communications and performs a synchronous (global) checkpointing for processes that belong to a checkpoint group. The system also performs a local checkpointing at respectively arbitrary times within each process. When a fault occurs, a validity of each checkpoint is examined in accordance with monitoring results of inter-process communications related to the fault process. If the most recent checkpoint of the fault process is valid, only the fault process is rolled back. If it is invalid, all processes of the checkpoint group are rolled back to the global checkpoint, or each of the processes are rolled back to each optimum (valid) checkpoint.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.