Software programmable bus disable system
US5924124A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 27, 1997 |
| Grant date | Jul 13, 1999 |
| Priority date | — |
| Expiry date | May 27, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1441
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microcontroller, which is configured in a certain mode, may generate signals that can cause malfunctions of the microcontroller or of other devices. For example, a prefetch cycle at an internal memory boundary may attempt to access external memory via a port when the port is connected to an I/O device. The system of the invention gates such signals and thus prevents possible damage to the microcontroller or peripheral device. In a preferred embodiment, a software programmable register is provided with one location dedicated to storing a bit. When that register bit is set, it prevents certain signals and address/data from appearing at the port and thus possibly causing harm to the microcontroller or a peripheral device connected to the port.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.