Apparatus and method for compensating for fixed pattern noise in planar arrays
US5925875A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 18, 1997 |
| Grant date | Jul 20, 1999 |
| Priority date | — |
| Expiry date | Apr 18, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/677
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for reducing fixed pattern noise in a planar array that includes an array of image responsive detectors, a dithering mechanism for dithering an observed image relative to the array, a high pass filter, and an image restorer. The fixed pattern noise in an observed image is reduced by dithering the observed image across a plurality of detectors forming a planar array, filtering the detector responses with the high pass filter, and passing the filtered signals through the image restorer. A correcting element can be used to iteratively update the fixed pattern noise estimate. In addition, a voter or a frame averager can be included to reduce errors that might adversely effect the fixed pattern noise estimate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.