Digital modulator having a digital filter including low-speed circuit components
US5926065A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 1997 |
| Grant date | Jul 20, 1999 |
| Priority date | — |
| Expiry date | Oct 8, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital demodulator which demodulates an analog signal obtained through a quadrature amplitude modulation to produce a digital demodulated signal includes a converter to convert the analog signal into a digital signal and a signal processor to quadrature-demodulating the digital signal from the converter. Assuming that the analog signal has a carrier frequency of f.sub.IF and the signal conversion is accomplished with the sampling frequency fs, the demodulator is set to satisfy fs=4.multidot.f.sub.IF /(2n+1), where n denotes a positive integer. The signal processing section conducts the quadrature demodulation according to a quadrature local oscillation signal having a frequency fc satisfying fc=fs/4.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.