Method and apparatus for an adaptive ramp amplitude controller in nonvolatile memory application
US5926409A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 5, 1997 |
| Grant date | Jul 20, 1999 |
| Priority date | — |
| Expiry date | Sep 5, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5642
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An adaptive amplitude ramp controller that regulates how fast and how high a series of voltages is applied to a targeted non-volatile memory cell. The series of voltages include a coarse ramp pulse and at least one fine ramp pulse. The coarse ramp pulse undergoes a first ramp rate until a particular voltage is reached. Thereafter, it undergoes a second ramp rate until the cycle associated with the coarse ramp pulse is completed or a target voltage is reached. Programming of the non-volatile memory cell occurs during this portion of the course ramp pulse. Thereafter, the adaptive amplitude ramp controller produces at least one fine ramp pulse. The fine ramp pulse is quickly ramped up at a third ramp rate and then undergoes a fourth ramp rate until the final desired voltage of the non-voltage memory cell is generally reached.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.