Hardware verification tool for multiprocessors
US5928334A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 1997 |
| Grant date | Jul 27, 1999 |
| Priority date | — |
| Expiry date | Mar 28, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/52
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One aspect of the invention relates to a method for detecting synchronization violations in a multiprocessor computer system having a memory location which controls access to a portion of memory shared by the processors, the memory location having at least one lock bit indicating whether the portion of memory is locked by one of the processors and a plurality of bits for storing a data value. The method comprises reading the memory location by an individual processor; testing the lock bit to determine whether the portion of memory is locked; if the portion of memory is not locked; asserting the lock bit to indicate the portion of memory is locked; incrementing the data value to represent a global access count; writing the lock bit and the data value back to the memory location; and incrementing a data value stored in a memory location associated with the individual processor to indicate an individual access count by the individual processor. The individual access counts for each processor are then summed and compared to the global access count to determine whether a synchronization violation has occurred.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.