Power semiconductor device and method for manufacturing the same
US5929482A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Apr 16, 1998 |
| Grant date | Jul 27, 1999 |
| Priority date | — |
| Expiry date | Apr 16, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28167
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An n.sup.+ semiconductor substrate (1) using a silicon wafer as a base material and including As includes oxygen of which the concentration is in the range of 12E17 atoms/cm.sup.3 to 20E17 atoms/cm.sup.3. The first epitaxial growth layer (2) of n type and a diffusion layer (3) of p type are formed in sequence on the second major surface (1S2) of the semiconductor substrate (1). The thickness of an epitaxial a growth layer (10) is set to be not more than 20 .mu.m. A trench (6) is formed so as to extend from a surface of the diffusion layer (3) to the inside of the first epitaxial growth layer (2). A gate oxide film (5) is formed on a bottom surface (6B) and a wall surface (6W) of the trench (6) and a conductive layer (11) fills the trench (6). An n-type source layer (4) is formed at a corner (6C) of the trench (6). After that, predetermined electrodes are formed and so on, to complete a device. With this structure, it is possible to reduce a leak current, prevent deterioration in main breakdown voltage and stabilize gate-oxide-film breakdown-voltage characteristics in a vertical MOSFET with trench gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.