LDO regulator dropout drive reduction circuit and method
US5929617A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 3, 1998 |
| Grant date | Jul 27, 1999 |
| Priority date | — |
| Expiry date | Mar 3, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/575
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
An low dropout voltage regulator (LDO) drive reduction circuit detects when the LDO's output voltage is going out of regulation due to a falling input voltage while the output is lightly loaded, and reduces the drive to the pass transistor in response. This action prevents the LDO's ground current from rising unnecessarily. The drive reduction circuitry directly monitors the voltage across the pass transistor; when above a predetermined threshold voltage which is typically well-below the LDO's specified dropout voltage, the pass transistor drive is permitted to vary as necessary to maintain a specified output voltage. If the monitored voltage falls below the threshold voltage, indicating that the input voltage is falling and the output is lightly loaded, the drive reduction circuit reduces the drive current, which would otherwise get increased in an attempt to restore the output voltage. The transconductance of the novel drive reduction circuit is relatively high, making the region over which the drive reduction circuit is active small and permitting the threshold voltage to be precisely set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.