Non-blocking dynamic fast packet switch for satellite communication system
US5930254A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 1997 |
| Grant date | Jul 27, 1999 |
| Priority date | — |
| Expiry date | Oct 15, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W40/20
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present invention overcomes the limitations encountered by conventional packet switching using virtual circuits. The present invention utilizes a "datagram" approach that routes every packet (22) conveyed by the system independently at every node in the network. The packets (22) are directed along an optimized pathway through the network by a fast packet switch (38) that directs traffic based on instructions from an adaptive routing processor (12A) that continuously runs an adaptive routing software (12B). This adaptive routing processor (14) supplies an output (12C) to a routing cache memory (20) which stores fast packet switch routing port output tags (30). An input packet processor (28) extracts a supercell address from the header (24) of each packet (22) and uses the supercell address (21A) as an index to retrieve a fast packet switch output port tag (30) stored in the routing cache memory (20). This tag (30) is prepended to the packet (22), and sent to an input port (36) of the fast packet switch (38), which includes a number of multi-stage self-routing switch modules (132) and a number of asynchronous packet multiplexors (134). The modules (132) and multiplexors (134) rou…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.