Standoff controlled interconnection
US5931371A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 1997 |
| Grant date | Aug 3, 1999 |
| Priority date | — |
| Expiry date | Jan 16, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for joining a component to a substrate applies a base solder portion to the substrate and provides a standoff solder portion in the base solder portion. The standoff solder portion has a higher melting temperature than the base solder portion and a height which substantially corresponds to a desired standoff height between the component and the substrate. The component is positioned on the standoff solder portion and the base solder portion is melted under reflow conditions to form a solder joint between the component and the substrate. This joint substantially encapsulates the standoff solder portion, wherein the reflow conditions create a dendritic structure between the base solder portion and the standoff solder portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.