Multi-panel video display control addressing of interleaved frame buffers via CPU address conversion
US5933154A · kind A · utility
51Cited by
13References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 30, 1994 |
| Grant date | Aug 3, 1999 |
| Priority date | — |
| Expiry date | Sep 30, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N9/12
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method and an apparatus for interleaving display frame buffers for use by multi-panel display(s) is disclosed. The system provides a data addressing transformation apparatus for converting CPU addresses for pixel positions of the multiple panels of display screen(s) to corresponding memory addresses so as to enable multiple video frame buffers to be interleavably stored in and retrieved from a single video memory system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.