Semiconductor memory device including a redundant memory cell circuit which can reduce a peak current generated in a redundant fuse box
US5933382A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 10, 1997 |
| Grant date | Aug 3, 1999 |
| Priority date | — |
| Expiry date | Dec 10, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/785
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A redundant fuse circuit for enabling a redundant memory cell to replace a defective memory cell in a semiconductor memory device is shown where the redundant fuse circuit includes a selection fuse coupled between a precharging device of the redundant fuse circuit and a power supply terminal. When the redundant fuse circuit is unused, the selection fuse is configured to be cut by a laser beam thereby preventing precharging of the redundant fuse circuit and, consequently, preventing an instantaneous peak current from occurring responsive to input to the redundant fuse circuit of memory cell address information corresponding to normal memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.