Compiling system and method for reconfigurable computing
US5933642A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 9, 1997 |
| Grant date | Aug 3, 1999 |
| Priority date | — |
| Expiry date | Apr 9, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/54
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A compiling system and method for generating a sequence of program instructions for use in a dynamically reconfigurable processing unit having an internal hardware organization that is selectively changeable among a plurality of hardware architectures, each hardware architecture executing instructions from a corresponding instruction set. Source files are compiled for execution using various instruction set architectures as specified by reconfiguration directives. Object files optionally encapsulate bitstreams specifying hardware architectures corresponding to instruction set architectures with executable code for execution on the architectures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.