Noise eliminating bus receiver
US5933799A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 17, 1997 |
| Grant date | Aug 3, 1999 |
| Priority date | — |
| Expiry date | Sep 17, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0292
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
There is provided a bus receiver including a first differential amplifier comparing an input signal to a first reference voltage, and transmitting a first pulse signal accordingly, a second differential amplifier comparing the input signal to a second reference voltage, and transmitting a second pulse signal accordingly, an exclusive OR circuit transmitting an exclusive OR pulse signal indicative of exclusive OR of the first and second pulse signals, a first flip-flop circuit receiving the exclusive OR pulse signal as clock, and receiving the second pulse signal as data, and a selector selecting one of the first and second pulse signals in accordance with an output of the first flip-flop circuit. The bus receiver readily eliminates noises. The bus receiver may further include a second flip-flop circuit receiving external clock as clock, and receiving an output of the selector as data. The provision of the second flip-flop circuit ensures that the bus receiver can be readily synchronized with other circuits electrically connected to the bus receiver and designed to operate under the same external clocks as those for the bus receiver.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.