Formation of resistor with small occupied area
US5935642A · kind A · utility
5Cited by
5References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 20, 1996 |
| Grant date | Aug 10, 1999 |
| Priority date | — |
| Expiry date | Nov 20, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49099
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Resistor material such as polysilicon is deposited on the insulating surface of a substrate and patterned to form resistor layers disposed generally parallel. Another resistor material such as polysilicon is deposited filling each space between adjacent resistor layers, with an insulating film being interposed between the upper and lower resistor materials, and etched back to form other resistor layers at respective spaces. After an insulating film is formed covering the resistor layers, contact holes are formed in the insulating film. A conductive layer is deposited and patterned to serially connect the resistor layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.