High-speed sigma-delta ADCs
US5936562A · kind A · utility
41Cited by
15References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 6, 1997 |
| Grant date | Aug 10, 1999 |
| Priority date | — |
| Expiry date | Jun 6, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/145
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An ADC system includes a sigma-delta modulator that receives an analog input and provides a first digital output and an analog output. An ADC, coupled to the sigma-delta modulator, receives the analog output as an input and provides a second digital output. A digital processor, coupled to the sigma-delta modulator and the ADC, receives the first and second digital outputs and provides a digital representation of the analog input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.