System and method for reducing flicker on a display
US5936621A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 1996 |
| Grant date | Aug 10, 1999 |
| Priority date | — |
| Expiry date | Jun 28, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S348/91
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system and method for reducing flicker in a display system using a flicker reduction circuit. The display includes a series of scan lines, each of which includes a set of pixels. The display is controlled by a video signal, which includes a series of video lines containing control variables that control the intensity of the pixels in the corresponding scan line. In one embodiment of the flicker reduction circuit, the flicker reduction circuit receives two of the video lines as input, and delays one of the one video lines using a memory, such that its control variables are synchronized in time with the other undelayed video line. The difference between the intensity of the synchronized pairs of control variables is determined, and the difference is fed into a look-up table. Based on the difference, the look-up table provides a control value that is then applied to one of the original synchronized control variables to provide a modified control variable that reduces flicker on the display screen.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.