Semiconductor memory device having burn-in test function
US5936910A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 23, 1998 |
| Grant date | Aug 10, 1999 |
| Priority date | — |
| Expiry date | Jul 23, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a semiconductor memory device including a plurality of word lines connected to memory cells, a word line level generating circuit for generating a suitable word line level generating voltage higher than a power supply voltage and a plurality of word line drivers, each for driving one of the word lines using the word line level generating voltage a plurality of row decoders activate a first number of the word line drivers in a usual mode and activate a second number of the word line drivers in a burn-in test mode. The second number is larger than the first number. A control circuit detects the word line level generating voltage and uses feedback to control the voltage to a definite level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.