Repair circuit of a flash memory cell and repair method
US5936970A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 26, 1996 |
| Grant date | Aug 10, 1999 |
| Priority date | — |
| Expiry date | Sep 26, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/83
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a repair circuit of a flash memory cell and repair method and has excellent effects in that it can reduce the power consumption by detecting the power supply applied to the chip, latching the repaired address stored in the fuse block after the chip itself sequentially reads the fuse block, comparing the latched address with the input repair address to access the main cell and repair cell, consuming the power only while the chip reads the fuse block, and using the latched repair address at other operation, and it can reduce the area of the chip by constructing into a cell array the cells to which the repair address is to be stored and using the sense amplifier commonly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.