Memory cell that includes a vertical transistor and a trench capacitor

US5937296A · kind A · utility

Assignee

• Siemens Aktiengesellschaft · DE

Inventor

• Norbert Arnold · Pfalzgrafenweiler, DE

Key dates

• Filing date: Dec 20, 1996
• Grant date: Aug 10, 1999
• Expiry date: Dec 20, 2016

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/395

Abstract

A memory cell for a dynamic random access memory includes a pass transistor and a storage capacitor. The transistor is a vertical transistor formed along an upper portion of a sidewall of a polysilicon-filled trench in a monocrystalline silicon body with the source and drain in the body and the source contact, gate and gate contact in the trench, with its gate dielectric being an oxide layer on the sidewall portion of the trench. The capacitor is a vertical capacitor formed along a deeper portion of the trench and has as its storage plate a lower polysilicon layer in the trench and as its reference plate a deep doped well in the body. The source contact and the storage plate are in electrical contact in the trench and the source contact and the gate contact are in the trench electrically isolated from one another.