Asic control and data retrieval method and apparatus having an internal collateral test interface function
US5938779A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 27, 1997 |
| Grant date | Aug 17, 1999 |
| Priority date | — |
| Expiry date | Feb 27, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/32
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
ASIC (Application-Specific Integrated Circuit) testability, troubleshooting access and visibility of internal circuitry are the primary targets of test engineering analysis. The widely applied boundary-scan technique is a useful interface but does not solve all problems connected with the PBA (Printed Board Assembly) manufacturing process. The invention provides an extension of the boundary-scan technique currently implemented to provide improved ASIC testability. The Collateral ASIC Test (method and logic) implemented in a boundary-scan device according to the invention makes possible a test process standardization to ASIC design and testing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.