Multilayer substrates methods for manufacturing multilayer substrates and electronic devices
US5939789A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 1997 |
| Grant date | Aug 17, 1999 |
| Priority date | — |
| Expiry date | Jul 16, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1189
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A multilayer substrate which is fabricated by laminating a plurality of substrates, each comprising an insulation film, a plurality of via holes which pass through the upper surface to the lower surface of the insulation film, a wiring which is provided on the upper surface of the insulation film and the upper surface of the via holes and electrically connected with the via holes, a bonding member which is provided on the lower surfaces of the via holes and electrically connected with the via holes, and a bonding layer which is provided on the upper surface of the insulation film where the wiring is formed and the method of fabrication thereof whereby large costs reduction and high density effect can be obtained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.