Host initiated PCI burst writes utilizing posted write buffers
US5941960A · kind A · utility
7Cited by
25References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 11, 1998 |
| Grant date | Aug 24, 1999 |
| Priority date | — |
| Expiry date | Feb 11, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4027
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bridge logic takes write cycles that appear one at a time as an address followed by an associated data word on a host bus, detects consecutive addresses, and uses this information to create burst cycles on a peripheral control interface (PCI) bus that has protocols that allow burst cycles.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.