Low voltage CMOS differential amplifier
US5942940A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 1997 |
| Grant date | Aug 24, 1999 |
| Priority date | — |
| Expiry date | Jul 21, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45454
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A CMOS differential amplifier uses a first pair of complementary MOSFETs and a second pair of complementary MOSFETs coupled to a power supply (by another pair of MOSFETs) in such a manner as to be self-biasing and have improved channel-length modulation characteristics. An N-type MOSFET couples the first and second complementary MOSFET pairs to ground potential via a first resistor, and a P-type MOSFET couples the first and second complementary MOSFET pairs to a power-supply via a second resistor. The first and second resistors can be provided using non-salicided N-type MOSFET resistors. The third N-type MOSFET preferably has a low-threshold voltage, including a zero-threshold voltage, and the substrates of the P-type MOSFETs in the first and second complementary pairs are further preferably connected to the sources of those MOSFETs in order to reduce body-sensitivity effects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.