VCO with multiple negative differential resistance devices
US5942952A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 1997 |
| Grant date | Aug 24, 1999 |
| Priority date | — |
| Expiry date | Jul 30, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/05
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A VCO includes a transistor having a plurality of negative differential resistance devices coupled in series to the source terminal of the transistor, with each of the devices having a negative differential resistance operating region. Biasing circuits are coupled to the drain and gate terminals along with operating voltages which set the oscillator to operating in a negative differential resistance region of at least one of the negative differential resistance devices so that oscillations of a selected frequency are produced at an output terminal. The transistor, the plurality of N devices, the DC biasing circuits, and the operating voltages are connected so that the oscillator negative differential resistance operating region is greater than N times as wide as each of the device negative differential operating regions individually.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.