Flip-mounted impedance
US5942957A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 1997 |
| Grant date | Aug 24, 1999 |
| Priority date | — |
| Expiry date | Sep 15, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/372
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A radio-frequency power amplifier includes a multiple-FET chip that is flip-mounted on a connection region of a substrate. An input impedance-matching network is also mounted on the substrate. The network includes a coplanar waveguide having an elongate waveguide signal conductor for each gate terminal on the FET chip with a distal end spaced from the connection region and a proximal end in the connection region. The distal ends are connected to a single base input conductor. The proximal ends are flip-mounted to respective ones of gate terminals of the FET chip. A capacitor couples each of the input signal conductor distal ends to an adjacent ground conductor. The signal conductors and capacitors provide a selected impedance at a selected frequency. The capacitors may be on a separate chip flip-mounted to the coplanar transmission line conductors, and may be formed as coplanar waveguides with open-ended signal conductors or as overlay capacitors. An output coplanar waveguide includes, for each drain terminal, an output signal conductor having an end in the connection region that is electrically connected to the flip-mounted FET chip. This waveguide also has a length selected to pr…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.