Nonvolatile ferroelectric memory
US5943256A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 2, 1998 |
| Grant date | Aug 24, 1999 |
| Priority date | — |
| Expiry date | Jan 2, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile ferroelectric memory comprises a memory cell array having memory cells arranged as a matrix array and each including a charge transfer transistor having a source or drain region connected to a bit line and a gate connected to a word line and a ferroelectric capacitor for information storage having one electrode connected to a plate line and the other electrode connected to the drain or source region of the charge transfer transistor. A first dummy line is arranged outside a bit line formed at an end of the memory cell array and second dummy bit lines are arranged between the bit line at the end of the memory cell array and the first dummy bit line. Dummy memory cells are connected to the second dummy bit line and have the same in configuration and size as the memory cells connected to the bit line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.