Robust phase estimator and recoverer for digital signals affected in particular by phase jitter
US5943380A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 1997 |
| Grant date | Aug 24, 1999 |
| Priority date | — |
| Expiry date | Mar 28, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0067
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The invention relates to apparatus for synchronizing the phase of a digital signal constituted by two digital components to be corrected defining two samples of a received signal at each symbol time, said apparatus serving to feed a regenerator for regenerating the signal in baseband by sampling and threshold decision-taking, said apparatus including: a first phase-locked loop (31) driven by a first broadband phase-error integrator (37), said first loop (31) being fed with the input signal (30) of the apparatus, and supplying a first phase error estimate (36); and an auxiliary second phase-locked structure (32) driven by re-processing means (38) for re-processing said first phase error estimate (36) established by said first phase-locked loop (31), and outputting a phase synchronized signal fed to an output regenerator (34) for regenerating the signal in baseband; said auxiliary second phase-locked structure (32) being fed with said input signal (30) of the apparatus via delay means (35).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.