Method for reducing the rate of interrupts in a high speed I/O controller
US5943479A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 2, 1997 |
| Grant date | Aug 24, 1999 |
| Priority date | — |
| Expiry date | Jan 2, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method to reduce the rate of interrupts by the central processing unit (CPU) without any loss of interrupts. The method uses two parameters. The first parameter sets the event threshold, which is the maximum value of consecutive events allowed to occur, for example, the maximum number of received data packets before an interrupt is posted (for example, a receive interrupt) to the CPU. The second parameter sets the event time-out, which is the maximum time an event can be pending before posting an interrupt to the CPU. The second parameter is needed since the flow of events in the system is unpredictable and without the time-out limit handling of the event can be delayed indefinitely.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.