Method and apparatus to calibrate and run optical delay devices
US5943636A · kind A · utility
5Cited by
3References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 24, 1997 |
| Grant date | Aug 24, 1999 |
| Priority date | — |
| Expiry date | Jul 24, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B10/07
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A calibrate and run bias voltage control method for an optical delay system utilizing a plurality of voltage controlled switches which may experience bias drift wherein during calibration an output optical power error signal of the system is monitored while rapidly changing the bias voltages to the switches according to a desired algorithm and setting the bias voltages at a the level achieved when the output error signal falls below a predetermined tolerance level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.