Error concealment method and apparatus
US5944851A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 24, 1997 |
| Grant date | Aug 31, 1999 |
| Priority date | — |
| Expiry date | Nov 24, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/70
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Bit streams transmitted from a coding system through a transmission channel are divided on a block-by-block basis based on bit numbers thereof and a parity bit added to each bit stream is checked to decide whether or not each bit stream is error bit stream having one or more error bits therein. Based on the check result, either each bit stream or a proximate bit stream for each bit stream is selected as an optimum bit stream, wherein the proximate bit stream is generated based on degrees of proximity between masked transform coefficients for each candidate bit stream and masked transform coefficients for each of reference bit streams spatially adjacent to each bit stream.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.