Full-swing high voltage data latch
US5945865A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 19, 1997 |
| Grant date | Aug 31, 1999 |
| Priority date | — |
| Expiry date | Aug 19, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356113
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A full-swing high voltage data latch for operation at relatively high power supply voltages. The full-swing high voltage data latch has a high voltage rail for supplying an upper voltage level and a low voltage rail for supplying a lower voltage level. A latch circuit is coupled to the upper voltage rail and to the lower voltage rail. The latch circuit is used for generating an output signal. The output signal switches with respect to an input signal when the high voltage rail and the low voltage rail operate in a low voltage mode and is latched in a state that the output signal is currently at when the high voltage rail and the low voltage rail changes state from said low voltage mode to a high voltage mode. An input circuit is coupled to the latch circuit for sending an input signal and a complementary input signal to the latch circuit. An output driver circuit is coupled to the latch circuit for receiving the output signal from the latch circuit and for providing a full-swing output data latch signal. The full-swing high voltage data latch ranges from the upper voltage level of the high voltage rail to ground.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.