Two-phase boosted CMOS switch drive technique and circuit
US5945872A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 6, 1997 |
| Grant date | Aug 31, 1999 |
| Priority date | — |
| Expiry date | Nov 6, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/242
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A circuit that produces a gate drive voltage for a MOS transistor switch includes an input that receives a supply voltage, a regulated voltage generating circuit that produces a regulated voltage, and a voltage storage element. A first switch connects the voltage storage element to sample one of the supply voltage and the regulated voltage during a first of first and second non-overlapping time intervals. The second switch connects the voltage storage element to increase the sampled voltage by another of the supply voltage and the regulated voltage to the gate drive voltage during the second non-overlapping time interval. A third switch connects the voltage storage element to provide the gate drive voltage to the MOS transistor switch during the second non-overlapping time interval. The regulated voltage generating circuit produces the regulated voltage such that a high level of the gate drive voltage exceeds the supply voltage yet is maintained less than a breakdown voltage of the MOS transistor switch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.