Single-ended to differential converter
US5945878A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 17, 1998 |
| Grant date | Aug 31, 1999 |
| Priority date | — |
| Expiry date | Feb 17, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/492
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A single-ended to differential converter (400, 500) has an input terminal (418, 518) which is adapted to be coupled to an inductance (412, 512). A first transistor (402, 502) which terminates an input signal received at the input terminal according to its transconductance has a first current electrode coupled to the input terminal. A second current electrode of the first transistor (402, 502) outputs one current of a differential output current. A second transistor (404, 504) has a control electrode coupled to the input terminal, a first current electrode coupled to a signal ground terminal, and a second current electrode for providing another current of the differential output current. Bias circuits bias the control electrodes of the first (402, 502) and second (404, 504) transistors to maintain the same DC currents through their current electrodes. The single-ended to differential converter (400, 500) reflects the noise produced by the first transistor (402, 502) in the second transistor (404, 504), and this common-mode noise can be rejected in a subsequent stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.