Method and means for efficient error detection and correction in long byte strings using integrated interleaved Reed-Solomon codewords
US5946328A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 17, 1997 |
| Grant date | Aug 31, 1999 |
| Priority date | — |
| Expiry date | Nov 17, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/2903
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and means for enhancing the error detection and correction capability obtained when a plurality of data byte strings are encoded in a two-level, block-formatted linear code using codeword and block-level redundancy by logically summing the data byte strings and mapping the logical sum and the data byte strings into counterpart codewords including codeword check bytes in accordance with the same linear error correction code. Next, the codewords are logically summed. The codewords and their logical sum are interleaved in a predetermined pattern prior to being recorded on a storage device or the like. On read back, the codewords of a block and their logical sum are syndrome processed to resolve any identified errors within the correction capability of any single word and any errors within the correction capability of any single word and block-level redundancy, and to provide signal indication when the correction capacity has been exceeded.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.