Digital signal processor architecture using signal paths to carry out arithmetic operations
US5948053A · kind A · utility
19Cited by
5References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 29, 1997 |
| Grant date | Sep 7, 1999 |
| Priority date | — |
| Expiry date | Aug 29, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7857
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital signal processor has an arithmetic operation device that carries out arithmetic operations. The arithmetic operation device has a plurality of elementary arithmetic operation units. A signal path-forming device forms signal paths for inputting and outputting signals to and from the elementary arithmetic operations units, according to a predetermined program. The arithmetic operation device carries out processing of a digital signal input to the digital signal processor after the signal paths have been formed by the signal path-forming device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.