Control system utilizing fault detection
US5949677A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 9, 1997 |
| Grant date | Sep 7, 1999 |
| Priority date | — |
| Expiry date | Jan 9, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05B23/0237
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A control architecture having improved fault detection and correction capabilities is disclosed. The system comprises primary and monitor control systems, each having an associated control signal. A fault detector generates an alarm signal based upon differences observed between the primary and monitor control signal. The detector comprises an integrator and a memory means, and alarm signals are generated based upon the total amount of difference observed over a predetermined period of time. In one embodiment of the invention, primary and monitor control signals are averaged to provide a signal that is more fault tolerant than the individual control signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.