Interface optimized computer system architecture
US5951665A · kind A · utility
20Cited by
9References
37Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 14, 1997 |
| Grant date | Sep 14, 1999 |
| Priority date | — |
| Expiry date | Nov 14, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system includes a bus system; a pluggable central processing unit circuit board, coupled to the bus system; a pluggable logic board coupled to the pluggable central processing unit circuit board through the bus system; a pluggable input/output board coupled to the pluggable logic board through the bus system; a first connector unit for directly connecting the pluggable central processing unit circuit board to a first predetermined location on the pluggable logic board; and a second connector unit for directly connecting the pluggable logic board to a predetermined location on the pluggable input/output board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.