Bus system having both serial and parallel busses
US5951666A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 24, 1997 |
| Grant date | Sep 14, 1999 |
| Priority date | — |
| Expiry date | Nov 24, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4291
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The bus system (2) for the transfer of data within a master-slave system (1) comprises a parallel data bus (3) and a serial data bus (4, 5), as well as at least one control line (15, 16) for a control signal (SnP, RnW) determining the manner of transfer, wherein each slave (S.sub.1 . . . n) can be connected to a data bus (3; 4, 5) corresponding to its interface (SIF.sub.p, SIF.sub.S) and can be controlled with respect to the manner of transfer. Upon the transfer of both serial data (SD) and parallel data (PD) with the addressing of the or each slave (Sn), a first control signal (serial, not parallel) for the type of transfer is set before a strobe signal (STRB) for the transfer of data is activated. For the determining of a write or read access, a further control signal (RnW) for the direction of transfer (read, not write) is set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.