Method and apparatus for serialized interrupt transmission
US5951669A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 1996 |
| Grant date | Sep 14, 1999 |
| Priority date | — |
| Expiry date | Dec 27, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system in which interrupt signals are serially transmitted from an input/output (I/O) controller is disclosed. The I/O controller initially receives the interrupt signals and then serially transmits them to an interrupt controller where the received interrupt signals are managed. According to the invention, the sequencing by which the interrupt signals are serially transmitted is controlled such that it largely conforms to the sequencing by which the received interrupt signals are processed at the interrupt controller, thereby controlling and reducing latency. The interrupt controller can be a separate integrated circuit chip or integral to another integrated circuit chip of the computer system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.