Integratable circuit configuration for stabilizing the operating current of a transistor by negative feedback, being suitable in particular for battery-operated devices
US5952864A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 1996 |
| Grant date | Sep 14, 1999 |
| Priority date | — |
| Expiry date | Feb 16, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/302
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integratable circuit configuration for stabilizing an operating point of a transistor by negative feedback includes first, second, third and fourth terminals. The fourth terminal is connected to a fixed ground potential, and the first and fourth terminals have a supply voltage source connected therebetween. A first transistor to be stabilized by negative feedback has a collector connected to the second terminal, an emitter connected to the fourth terminal, and a base connected to the third terminal. A second transistor has an emitter connected to the second terminal, a collector connected to the third terminal, and a base. A first resistor is connected between the first terminal and the second terminal. A second resistor is connected between the base of the second transistor and the fourth terminal. A series circuit has at least one first diode and one second diode and is connected between the first terminal and the base of the second transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.