SIMD TCP/UDP checksumming in a CPU
US5953240A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 1997 |
| Grant date | Sep 14, 1999 |
| Priority date | — |
| Expiry date | Jun 23, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/505
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A CPU adapted to calculate a checksum simultaneously on multiple values packed into a single register. An adder is provided which adds a number of values packed into a first register to a number of packed values from a second register. The adder is constructed, or partitioned, so that the values do not propagate their carry bit to the next value. A special carry bit adder is provided which will add a carry bit out of each partitioned portion back into the sum value to generate the sum required by the checksum protocol.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.