Frame synchronization circuit and communications system
US5953378A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 1997 |
| Grant date | Sep 14, 1999 |
| Priority date | — |
| Expiry date | Sep 19, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0061
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Likelihood calculating circuit A1 calculates the hamming distance between a received data series and a unique word as likelihood data d1. Likelihood calculating circuit A2 calculates the number of transmission errors using redundant data, and outputs this value as likelihood data d2. Likelihood data d1,d2 are added at adding circuit 21, and the output thereof is compared to the threshold value of determination circuit with threshold 22. The results of this comparison are output as determination signal with threshold DT. Synchronous determination circuit 23 generates a synchronous determination signal SD based on determination signal with threshold DT. Accordingly, the present invention provides a frame synchronization circuit in which it is possible to avoid out of synchronization or false synchronization, without increasing the amount of redundancy necessary to detect frame synchronization.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.