Method and apparatus for reducing the number of programmable architecture elements required for implementing a look-up table in a programmable logic device
US5953537A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 14, 1994 |
| Grant date | Sep 14, 1999 |
| Priority date | — |
| Expiry date | Jun 14, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1736
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for reducing the number of programmable architecture elements required for implementing a look-up table in a programmable logic device. At least one logic function to be performed by the look-up table is chosen. An output state is determined for each set of inputs to the look-up table, the output state being an array of outputs of the look-up table. Each output state is made up of responses of the chosen logic functions to a particular set of input variables. Identical output states are formed into groups. Selected groups of the output states which do not require programmable architecture elements are eliminated. A programmable architecture element is then assigned for each remaining group of output states.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.